Power supply circuits within modern integrated circuit (IC) devices are often required to generate a constant, stable output voltage from a varying input voltage. For example, in automotive applications a power supply circuit may be required to generate a regulated 7V output voltage from an input voltage from a battery comprising a voltage level ranging from, say, a nominal battery voltage of 14V down to 2.5V during a ‘cranking’ pulse. The term ‘cranking pulse’ in this context describes a high voltage drop that may occur with a discharged battery when a driver attempts to start up a vehicle. Initially, the battery voltage may operate with its normal value, for example around 14V. When the driver attempts to start the vehicle, the battery voltage may drop to a low value (e.g. down to as low as, say, 2.5V) within a short time interval before it returns to its normal level. However, it is very important to keep any supply voltage provided to automotive electronics connected to the battery at a certain stable voltage level to avoid damage to the electronics and avoid unpredictable data processing.
In order to be able to regulate such a range of input voltage levels, it is known to use a switched mode power supply (SMPS), for example such as a Buck-Boost converter. SMPS's are capable of converting a varying input voltage to a higher or lower regulated output voltage. The switching action of the SMPS converts the substantially continuous input voltage into a pulsed signal comprising a substantially square waveform, which is then filtered to remove the high frequency components and create a regulated continuous output voltage signal. The basic elements of an SMPS typically comprise power switch devices, an inductor and capacitor for energy storage and filtering, and a feedback/control circuit to modulate the switch timing to regulate the output voltage. Advantageously, the power switch device(s) of an SMPS typically continuously switch between fully on and fully off. As such, they spend very little time in the high-dissipation transition region of operation. Accordingly, SMPS's enable efficient voltage regulation as compared with, for example, a linear voltage regulator, in particular for large differential input/output voltages.
During a quiescent (low power) mode of operation, whereby the voltage regulator circuit is not required to drive a load current (but is required to maintain the output voltage level), the efficiency of the voltage regulator circuit is determined by the quiescent current thereof. Because of their switching nature, SMPS's comprise a relatively high quiescent current, in particular within their control circuitry. In contrast, a linear regulator, such as a low dropout (LDO) regulator, comprises a significantly smaller quiescent current. Accordingly, during such a quiescent mode, it is desirable to turn the SMPS off, and use a linear regulator, such as a low dropout (LDO) regulator, to generate the required (quiescent) output voltage signal. An LDO regulator typically comprises a MOSFET (metal oxide field effect transistor) controlled by, for example, a differential amplifier (error amplifier).
FIGS. 1 and 2 illustrate a simplified circuit diagram of an example of a known voltage regulator circuit 100 comprising an SMPS component 110 and LDO regulator component 120 operably coupled in parallel, and arranged to generate a constant, stable output voltage 130 from a varying input voltage 140. The SMPS component 110 comprises power switch devices 111, 112, an inductor 113 and capacitor 114 for energy storage and filtering, a control module 115 arranged to receive a feedback signal 116 and to modulate the switch timing of the power switches 111, 112 to regulate the output voltage 130. The LDO regulator component 120 comprises a MOSFET 121 and a control component 122, for example comprising a differential amplifier (not shown), arranged to receive a feedback signal 123 and to modulate the conductivity of the MOSFET 121 to regulate output voltage 130.
In particular, FIG. 1 illustrates the voltage regulator circuit 100 during a quiescent mode of operation. As such, in this quiescent mode the SMPS component 110 is disabled, whilst voltage regulation is performed by the LDO regulator component 120. A limitation of a linear regulator such as the LDO regulator component 120 is that it is limited to outputting a maximum voltage level up to that of the input voltage 140 (less the saturation voltage of the MOSFET 121). Accordingly, if the input voltage 140 drops below the required/intended output voltage level, for example during a cranking pulse, it is necessary to revert to the SMPS component 110 to step-up the input voltage 140 to the required and/or intended output voltage level, as illustrated in FIG. 2. As a result, the LDO regulator component 120 will become disabled, whilst the SMPS component 110 is activated in boost mode to perform the required step-up voltage regulation.
A problem with the known voltage regulator circuit 100 illustrated in FIGS. 1 and 2 is that the MOSFET 121 comprises a parasitic PNP transistor structure. Under certain conditions (under high drain current, when the on-state drain to source voltage is in the order of some volts), this parasitic PNP transistor would be triggered, making the MOSFET 121 uncontrollable. It is therefore necessary to short the base (the bulk of the MOSFET) of the parasitic transistor to its emitter (the source of the MOSFET) to prevent spurious latching. This shorting however creates a p-n junction diode 124 between the drain (anode) and the source (cathode) of the MOSFET 121, making it able to block current in only one direction. Specifically, this diode 124 within the MOSFET 121 allows current to flow from the output 130 of the voltage regulator circuit 100 to the input of the voltage regulator circuit. Accordingly, if the input voltage 140 drops below the require output voltage level, and the voltage regulator circuit 100 reverts to the SMPS component 110 to boost the input voltage to the required/intended output voltage, the diode 124 provides a current path from the output 130 of the voltage regulator circuit 100 to the input, effectively tying the output voltage 130 to the input voltage 140 under such low input voltage conditions.